LeCroy's new ECLine Model 4508, a standard CAMAC module, consists of two independent 8- input logic units, each able to perform any kind of logical operation on the eight inputs. Each section provides eight outputs. The circuit is programmable so that each output can correspond to a different logical combination of the inputs. There is no limitation on the complexity of the logical function which can be accomplished on the eight inputs. The logical configuration can be either an AND and OR, an exclusive OR, an Inhibit, a multiplicity function, or any combination of these functions as well. But the usefulness of this circuit goes much further. It finds application anywhere a logical problem exists. Other examples of useful applications are eight-bit output register (word generator), adder, colinearity, etc.
As soon as a strobe pulse arrives, the input pattern is stored on registers. These can be read. and reset. reset through normal CAMAC operations, or they can be reset by an external fast
The front-panel 17-pair flat cable connectors are conveniently compatible for interconnection with LeCroy ECLine discriminators, scalers, and other logic units.
INPUT CHARACTERISTICS Number of Channels: 2, identical. Inputs: Eight, in a single 2 x 17 pin connector; 110 Ohm input impedance (op- tionally high impedance available); accept differential ECL levels. Input Width: Minimum input pulse width or overlap to produce outputs, 10 nsec; maximum width D.C. Maximum Rate: >65 MHz. Strobe Input: One per section; Lemo-type connector; 50 Ohm input impedance; a negative NIM logic pulse enables; minimum width to enable, 5 nsec; maximum frequency, 65 MHz; the strobe pulse must precede the input pulses by 2 nsec to achieve exact time coincidence; a strobe pulse must always be followed by a clear pulse or by a CAMAC reset function or command. Clear Input: One per section; Lemo-type connector; 50 Ohm input impedance; a negative NIM logic pulse clears pattern registers when operating in "overlap", "shaped" or "continuous" mode, resets output levels when operating in "continuous" mode; minimum width to clear, 5 nsec. OUTPUT CHARACTERISTICS Outputs: Eight per channel (single 2 x 17 pin connector); complementary ECL levels. Output Width: Depends on the output operation mode. In the "shaped" mode, the output width can be adjusted between <5 nsec and >100 nsec via a front-panel potentiometer common to each eight outputs. In the "over- lap" mode, the output width is equal to the input width or coincidence overlap. In the "continuous" mode, the outputs, enabled by the strobe pulse, are frozen in their dynamic state until the next external fast clear or CAMAC reset function or command. Syncro Output: One per section; Lemo-type connector; high output impedance (current source). When terminated into 50 Ohm, NIM levels are generated. The syncro output reproduces the strobe pulse after a constant delay of (17 +/- 1) nsec. Pulse width equals the width of the normal outputs. This output can be used, for instance, as a strobe for subsequent units or as a clear for the unit itself. GENERAL Strobe-Clear LED: A front-panel LED fires in conjunction with any strobe pulse and until the next clear. Propagation Delay: (17 +/- 3) nsec in "overlap" mode; in "shaped" or "continuous" mode, the delay is fixed by the strobe timing; delay between strobe and output, (21 +/- 1) nsec independent of the chosen logical operation. Operation Modes: A front-panel switch, one per section, allows choice of one of the following three output operation modes, common to all outputs of a section: Overlap (OVL)-The output pulse width is determined by the input pulse widths (OR function) or by the input pulse overlap (for other functions). Shaped (SHP)-The output pulse, which includes an AND with the strobe pulse, is reshaped. The output pulse width is adjustable in the range 5-100 nsec through a potentiometer (one per section) on the front panel. Continuous (CNT)-The outputs, which include an AND with the strobe pulse, are frozen in their dynamic state until an external fast clear or a CAMAC C, Z, F9, or F2 occurs. This output mode is particularly con- venient to avoid timing problems. Input Pattern: As soon as a strobe pulse is applied, the input pulse configuration is stored on registers which can be read afterwards by CAMAC. This is true for any of the output modes. This very useful facility allows an off- line reconstruction of the trigger. In order to clear the pattern registers, the strobe pulse has to be followed by a clear pulse or by a CAMAC C, Z, F9, or F2. Logical Functions Accomplished: Each section of the module, after suitable programming , is able to perform any kind of logical operation on the eight inputs. The eight outputs are separately programmable so that each output can corre- spond to a different logical operation on the inputs. Or, at the other extreme, all outputs can have the same meaning if higher fan-out is required. Programming: Each 4508 section contains a 256-word x 8-bit memory, which must be programmed with 256 consecutive steps to indicate which of these 256 possible configurations of the 8 inputs will give or not give an output. CAMAC COMMANDS AND FUNCTIONS Z or C: Word 0 is addressed in the memories in both sections; pattern registers are cleared. X: An X= 1 response is generated for any valid CAMAC function (F) shown below. Q: A Q=l response is generated for any valid CAMAC function, except when the memory addresses overflow. (This latter feature permits one to recognize when the reading or the loading of a memory has been completed.) FO: FO-AO, read first section 8-bit input pattern; FO-A1, read second section 8-bit input pattern; FO-A2, read first section memory content at the given address; the memory content is displayed on read lines Rl-R8, the given address on read lines R9-Rl6. FO-A3, as before but for the second section. F2: F2-AO, read first section 8-bit pattern and reset at S2; reset output levels when operating in continuous mode; F2-A1, same as F2-A0, but for the second section. F2-A2, read first section memory content at the given address (as for FO-A2) and increment address by one at S2; F2-A3, same as F2-A2, but for the second section. F9: F9-A0, clear first section pattern; reset first section output levels when operating in continuous mode; F9-A1, as above, but for the second section; F9-A2 or F9-A3, reset memory address in both sections. F16: F16-A0, load first section memory content at the given address; data have to be sent on write lines W1-W8; F1 6-Al, as above, but for the second section. Fl6-A2, random access to the first section memory at S1 (the selected address has to be sent on write lines W9-Wl6); load memory content with data present on W1-W8, at the selected address, at S2. Fl6-A3, same as above, but for the second section. F18: F18-AO, load first section memory content, at the given address, with data present on Wl-W8, at Sl; increment address by 1 at S2. F18-Al, as above, but for the second section. Fl8-A2 or Fl8-A3, random access to both section memories (the selected address has to be sent on write lines W9-Wl6).