3377 picture

Manual in .PDF format

The CAMAC model 3377 Time Digitizer has two primary operating modes, common stop and common start. These two modes are implemented by completely different programs loaded into the Xilinx gate array chip, which controls nearly all logic functions in the module.

The normal mode is common stop, and this program is loaded on power up. To load the common start program the following sequence of CAMAC operations to the module is required:

1. F30, any subaddress. This selects programming mode and resets the Xilinx gate array. The default program load is the common stop mode.

2. F21, any subaddress. This selects the common start program load. To reprogram the commmon stop mode, simply skip this step.

3. F25, any subaddress. This begins the programming of the xilinx chip, using the selected program load (or the default load). This will take about 200 milliseconds to complete.

4. F13, any subaddress. Test the done flag, return Q=l when programming is complete. The host computer should loop on this command until Q is equal to 1.

5. F9, any subaddress. This is REQUIRED after reprogramming. This resets the PAL which allows the Xilinx to be programmed, causing all function codes to be ignored by the PAL, except for F30, which starts the reprogramming sequence. The F9 command also MUST be the FIRST command received by the module after power up.

The CAMAC functions for the two modes of operation. Some functions are used only in common start mode.

 FO,AO  Read FIFO data until end of event
 FO,Al  Read FIFO data always (ignore end of event)
 FO,A2  Examine FIFO output, do not advance FIFO

 Fl,AO  Read Control register 0
 Fl,Al  Read Control register 1
 Fl,A2  Read Control register 2
 Fl,A3  Read Control register 3
 Fl,A4  Read Control register 4 (common start only)
 Fl,A5  Read Control register 5 (common start only)

 F8,AO  Test LAM

 F9,AO  Clear all data and events

 F10,AO  Clear LAM

 F16,AO  Write 16 bit data to FIFO
 F16,Al  Write 16 bit data to FIFO and set fifo tag bit

 F17,AO  Write Control register 0
 F17,Al  Write Control register 1


F17,A2  Write Control register 2
F17,A3  Write Control register 3
F17,A4  Write Control register 4 (common start only)
F17,A5  Write Control register 5 (common start only)
  Disable LAM
F24,Al  Disable Acquisition mode
F25,AO  Initiate test cycle (common start only)

F26,AO  enable LAM
F26,Al  Enable Acquisition mode

F27,AO  test buffering in progress (BIP)
F27,Al  test busy
F27,A2  test event ready
F27,A3  test fifo tag bit

The register implementations for the two different modes are similar, but not identical. There are up to 6 registers, all accessed by F17 (write) and F1 (read), and subaddresses 0 to 5.

Up to a higher level directory  | |  For more information